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FPGA Design Engineer (MTD, Tualatin, OR)

  • Tualatin, OR, US +1 more…
  • $123,100–$196,900 a year
  • Detected 7 days ago

Key facts

Location
Tualatin, OR, US +1 more…
Workplace
Not stated
Pay
$123,100–$196,900 a year
Contract
Not stated
Detected
3 Nov 2026
Posted
Not stated

About the role

The employer’s listing didn’t include a summary.

The full description is on Teradyne’s careers site (opens in a new tab).