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FPGA Engineering Manager (MTD, San Jose, CA)

  • San Jose, CA, US
  • $171,000–$273,600 a year
  • Detected 7 days ago

Key facts

Location
San Jose, CA, US
Workplace
Not stated
Pay
$171,000–$273,600 a year
Contract
Not stated
Detected
3 Nov 2026
Posted
Not stated

About the role

The employer’s listing didn’t include a summary.

The full description is on Teradyne’s careers site (opens in a new tab).